Bert Simonovich's Design Notes

Innovative Signal Integrity & Backplane Solutions

PCB Vias – An Overview

with 5 comments

imageVias make electrical connections between layers on a printed circuit board. They can carry signals or power between layers. For backplane designs, the most common form of vias use plated through hole (PTH) technology. They connect the pins of connectors to inner signal layers. A PTH via is formed by drilling a hole through the layers to be connected and then copper plating it.

High Density Interconnects (HDI) is another via technology used to form very small vias where drilling holes, using a conventional drill bit, is impractical. Also known as micro-vias, this technology creates the hole with a laser before plating.

Via Aspect Ratio

Via aspect ratio is defined as the ratio of the circuit board thickness to the smallest unplated drilled hole diameter. It is an important metric you need to be aware of when specifying the minimum via hole size for your design, and designing your stack-up. For example, an unplated via with a drill diameter of 0.020 inches and a board thickness of 0.200, would have an aspect ratio of 10:1. The smaller the aspect ratio, the more consistent the plating is throughout the length of the via. It is desirable to have 2 mil plating thickness for the via walls. Large aspect ratio vias tend to have more plating at each end compared to the middle. This increases the chance of cracked via barrels due to z-axis expansion while soldering.

An aspect ratio of 6:1 pretty much ensures your board can be fabricated anywhere. Most high-end board shops have the capability of fabricating boards with 10:1 aspect ratio; for drill diameters of less than 0.020 inches. Practically, the smallest drill diameter used for a through holed via is 0.013 inches. At 10:1, the maximum board thickness would be 0.130 inches.

For drill diameters larger than 0.020 inches, the max aspect ratio can be anywhere from 15:1 to over 20:1; depending on the board shop. Since backplane via hole size is driven by the compliant pins of the connector, it is best to work with your board shop to determine the maximum board thickness they can fabricate with the minimum finished hole size (FHS) specified in the design.

Via Configurations

The following lists the various via configurations you might expect to find on any multi-layer PCB design:

  • Stub Via
  • Through Via
  • Blind or Micro-via
  • Buried Via
  • Back-drilled Via

Stub Via

imageThe Stub Via is the most common via configuration found in PCBs today. As illustrated, there are two variations; Stub Via A and Stub Via B.

For the Stub Via A example, it shows the through portion starting from the top layer and ending at some inner layer. The stub portion is the remaining portion continuing from the inner layer junction to the bottom layer.

The Stub Via B example shows the through portion  originating from one internal signal layer and terminating on another internal signal layer. In this scenario, there are two stubs. The first stub is from the first internal layer junction to the top layer; the second stub is from the second internal layer junction to the bottom layer.

Through Via

imageThrough vias are the oldest and simplest via configurations originally used in 2-4 layer PCB designs. Since the signals originate and terminate from the outer layers of the PCB, there are no stubs. In multi-layer PCB applications, they are an inexpensive way to eliminate the resonance effects caused by stubs where other mitigation techniques are not practical or are too expensive.


Blind/Buried Via

imageBlind and buried vias are just like any other via, except  they do not go all the way through the PCB. A Blind Via connects one or more internal layers to only one external layer. Controlled-depth drilling is used to form the holes prior to plating.

A buried via, on the other hand, is a plated hole which is completely buried within the board. It connects one or more internal layers and does not connect to an external layer. Using buried via technology is costly because the inner layers being interconnected need to be fully fabricated and plated before final lamination of the entire PCB.

A micro-via is a form of blind via. Because the holes are so small (0.006 inches or less), they are formed using lasers, and cannot penetrate more than one or two layers at a time. They are most commonly used in high-density PCB designs like cell phones, or in FPGA and custom ASIC chip packaging.

Back-drilled Via

imageHigh speed point-point serial link based backplanes are often thick structures; due to the system architecture and card-card interconnect requirements. Back-drilling the via stub is common practice on thick PCBs to minimize stub length for bit-rates greater than 3Gb/s.

Back-drilling is a process to remove the stub portion of a PTH via. It is a post-fabrication drilling process where the back-drilled hole is of larger diameter than the original PTH. This technology is often used instead of blind-via technology to remove the stubs of connector vias in very thick high-speed backplane designs. State of the art board fabrication shops are able to back-drill to within 8 mils of the signal layer to keep, so there will always be a small stub portion attached to the via.

Back-drilling is not without limitations. Smaller vias and tighter pitch driven by large pin count BGA packages makes back-drilling impractical in these applications; due to drill bit size and tolerance issues. Fortunately, smaller via diameters limit the maximum PCB thickness due to aspect ratio; thereby limiting the length of the stub to the board thickness. Careful planning the high-speed layers within the stack-up is one way to control stub length.

imageWe worry about stubs in high-speed designs because they cause unwanted resonant frequency nulls which appear in the insertion loss plot of the channel. If one of these frequency nulls happen to line up at or near the Nyquist frequency of the bit rate, the received eye will be devastated resulting in a high bit-error-rate; even link failure.  A shorter stub length means these resonances will be pushed out further in frequency; ideally past the 5th harmonic of the Nyquist frequency as a rule of thumb.

Rules of thumb, in general, are no substitute for actual modeling and simulation. You should never depend on them to sign-off the final design; but you can use them to gain some intuition before hand. With that in mind, you can estimate the maximum stub length in inches using the following equation:



L Stub_max = maximum stub length in inches.

Dkeff = effective dielectric constant of the material surrounding the via hole structure.

BR = Bit rate in GB/s.

For example, the maximum stub length at 5GB/s should be less than 0.120 inches in FR4 material with a Dkeff of 4.0 to ensure the first resonant frequency null is greater than 5 times the Nyquist frequency of the bit rate. If the stub length is greater than this, it does not mean the design will not work at 5GB/s. Depending on just how much longer it is means there will be less than optimum eye opening at the receiver.

If you know the length of the stub, you can predict the fundamental resonant frequency, using the following equation:



Stub_len = stub length in inches.

fo = fundamental resonant frequency in GHz

So, using the same  Dkeff of 4.0, and stub length of 0.120 inches, we calculated in the above example, the first resonant frequency null would occur at approximately 12.3 GHz. If we assume this is the 5th harmonic, then the Nyquist frequency is approximately 2.5GHz and the bit rate is 5Gb/s; which is where we started.

Written by Bert Simonovich

February 15, 2011 at 1:29 pm

5 Responses

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  1. Thanks for sharing a very informative article- How do PCB shops inspect back-drill vias to make sure the boards are built corectly per prints?


    joe Vo
    Broadcom Corp.

    Joe Vo

    January 30, 2013 at 3:16 pm

    • Every board shop will have their own process and methodology. One method, I am familiar with, requires additional connectivity features, shorted to ground, to be included in the artwork. When the drill stops at the required depth, it breaks the short. Then it is the standard bed of nails connectivity testing to verify the signal nets are still in tack and there are no shorts or opens where there shouldn’t be. It is best to work with the intended supplier, early in the design cycle, to ensure the design is spec’d correctly to their process.

      Bert Simonovich

      January 30, 2013 at 6:55 pm

  2. Great article on pcb via…

    From your experience what do you expect cost difference is between HDI PCB versus PTH PCB? Of course assumption is same size pcb, same material ( FR4), etc.


    Steve Kim

    August 26, 2013 at 11:43 am

    • Steve, Thank you for your interest. I really have not done any HDI PCB designs to compare the cost. However, a Google search has lead me to this article that has done some cost analysis that I think is what you are looking for. Follow the link near the bottom of the article to Figure 6 [PDF format] for a summary of cost for different layer count and technology.

      Bert Simonovich

      August 27, 2013 at 9:11 am

  3. Wow, thank you for all this information on PCB vias. I found it very interesting that blind and buried vias are just like other vias, except they don’t go all the way through the PCB. I don’t know a lot about circuit boards, but I think it’s great that we are finding new ways to do this stuff.

    Gregory Willard

    August 2, 2016 at 8:16 am

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